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CSUR
2006
147views more  CSUR 2006»
14 years 9 months ago
A survey of research and practices of Network-on-chip
resents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. ...
Tobias Bjerregaard, Shankar Mahadevan
IJCSA
2008
100views more  IJCSA 2008»
14 years 9 months ago
A Smart Architecture for Low-Level Image Computing
This paper presents a comparison relating two different vision system architectures. The first one involves a smart sensor including analog processors allowing on-chip image proce...
A. Elouardi, Samir Bouaziz, Antoine Dupret, Lionel...
ESWA
2007
105views more  ESWA 2007»
14 years 9 months ago
Applying rough sets to prevent customer complaints for IC packaging foundry
Packaging is classified as one of back-end processes in the integrated circuits (ICs) manufacturing, highly capital-intensive and involves complex processes. Unlike the front-end...
Hsu-Hao Yang, Tzu-Chiang Liu, Yen-Ting Lin
ET
2007
69views more  ET 2007»
14 years 9 months ago
Oscillator-Based Reconfigurable Sinusoidal Signal Generator for ADC BIST
Abstract In order to perform an on-chip test for characterizing both static and transmission parameters of embedded analog-to-digital converters (ADCs), this paper presents an osci...
Hsin-Wen Ting, Cheng-Wu Lin, Bin-Da Liu, Soon-Jyh ...
TCAD
2008
100views more  TCAD 2008»
14 years 9 months ago
Robust Clock Tree Routing in the Presence of Process Variations
Abstract--Advances in very large-scale integration technology make clock skew more susceptible to process variations. Notwithstanding efficient exact zero-skew algorithms, clock sk...
Uday Padmanabhan, Janet Meiling Wang, Jiang Hu