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DAC
2009
ACM
16 years 5 months ago
Statistical reliability analysis under process variation and aging effects
Circuit reliability is affected by various fabrication-time and run-time effects. Fabrication-induced process variation has significant impact on circuit performance and reliabilit...
Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan...
ICCAD
2001
IEEE
106views Hardware» more  ICCAD 2001»
16 years 1 months ago
A Layout-Aware Synthesis Methodology for RF Circuits
In this paper a layout-aware RF synthesis methodology is presented. The methodology combines the power of a differential evolution algorithm with cost function response modeling a...
Peter J. Vancorenland, Geert Van der Plas, Michiel...
ASPDAC
2009
ACM
104views Hardware» more  ASPDAC 2009»
15 years 11 months ago
Addressing thermal and power delivery bottlenecks in 3D circuits
— The enhanced packing densities facilitated by 3D integrated circuit technology also has an unwanted side-effect, in the form of increasing the amount of current per unit footpr...
Sachin S. Sapatnekar
DAC
2004
ACM
15 years 10 months ago
Low voltage swing logic circuits for a Pentium 4 processor integer core
The Pentium® 4 processor architecture uses a 2x frequency core clock[1] to implement low latency integer ops. Low Voltage Swing logic circuits implemented in 90nm technology[2] m...
Daniel J. Deleganes, Micah Barany, George Geannopo...
ISCAS
1995
IEEE
102views Hardware» more  ISCAS 1995»
15 years 8 months ago
Log-Domain Filters Based on LC Ladder Synthesis
Abstract. A design method is proposed for the synthesis of linear, high-order, continuous-time filters using a unique translinear integrator circuit. Unlike previous attempts at i...
D. Perry, Gordon W. Roberts