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» Time, Hardware, and Uniformity
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89
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ICCD
1999
IEEE
91views Hardware» more  ICCD 1999»
15 years 5 months ago
Architectural Synthesis of Timed Asynchronous Systems
ions", in IEEE Transactions on CAD of VLSI, 25(3):403-412, March, 2006. , E. Mercer, C. Myers, "Modular Verification of Timed Systems Using Automatic Abstraction" in...
Brandon M. Bachman, Hao Zheng, Chris J. Myers
123
Voted
SIGCOMM
1995
ACM
15 years 4 months ago
Design, Implementation, and Evaluation of a Software-Based Real-Time Ethernet Protocol
Distributedmultimedia applicationsrequire performanceguarantees from the underlying network subsystem. Ethernet has been the dominant local area network architecture in the last d...
Chitra Venkatramani, Tzi-cker Chiueh
74
Voted
ICCAD
2007
IEEE
115views Hardware» more  ICCAD 2007»
15 years 9 months ago
Timing optimization by restructuring long combinatorial paths
—We present an implementation of an algorithm for constructing provably fast circuits for a class of Boolean functions with input signals that have individual starting times. We ...
Jürgen Werber, Dieter Rautenbach, Christian S...
ISQED
2003
IEEE
116views Hardware» more  ISQED 2003»
15 years 6 months ago
Analyzing Statistical Timing Behavior of Coupled Interconnects Using Quadratic Delay Change Characteristics
With continuing scaling of CMOS process, process variations in the form of die-to-die and within-die variations become significant which cause timing uncertainty. This paper prop...
Tom Chen, Amjad Hajjar
DATE
1998
IEEE
98views Hardware» more  DATE 1998»
15 years 5 months ago
AFTA: A Formal Delay Model for Functional Timing Analysis
Despite its importance, we find that a rigorous theoretical foundation for performing timing analysis has been lacking so far. As a result, we have initiated a research project th...
V. Chandramouli, Jesse Whittemore, Karem A. Sakall...