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» Time, Hardware, and Uniformity
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95
Voted
ISPD
1997
ACM
104views Hardware» more  ISPD 1997»
15 years 5 months ago
Timing driven placement in interaction with netlist transformations
In this paper, we present a new approach that performs timing driven placement for standard cell circuits in interaction with netlist transformations. As netlist transformations a...
Guenter Stenz, Bernhard M. Riess, Bernhard Rohflei...
98
Voted
ASPDAC
2007
ACM
119views Hardware» more  ASPDAC 2007»
15 years 4 months ago
Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng,...
DATE
2010
IEEE
119views Hardware» more  DATE 2010»
15 years 29 days ago
Practical Monte-Carlo based timing yield estimation of digital circuits
—The advanced sampling and variance reduction techniques as efficient alternatives to the slow crude-MC method have recently been adopted for the analysis of timing yield in dig...
Javid Jaffari, Mohab Anis
98
Voted
SIGMETRICS
2000
ACM
111views Hardware» more  SIGMETRICS 2000»
15 years 16 days ago
AMVA techniques for high service time variability
Motivated by experience gained during the validation of a recent Approximate Mean Value Analysis (AMVA) model of modern shared memory architectures, this paper re-examines the &qu...
Derek L. Eager, Daniel J. Sorin, Mary K. Vernon
SIGMETRICS
1998
ACM
127views Hardware» more  SIGMETRICS 1998»
15 years 12 days ago
On Calibrating Measurements of Packet Transit Times
We discuss the problem of detecting errors in measurements of the total delay experienced by packets transmitted through a wide-area network. We assume that we have measurements o...
Vern Paxson