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81
Voted
DATE
2002
IEEE
15 years 5 months ago
2002
IEEE
In this paper, we address the problem of simultaneous routing and buffer insertion. Recently in [12, 22], the authors considered simultaneous maze routing and buffer insertion und...
103
Voted
ASYNC
2000
IEEE
15 years 5 months ago
2000
IEEE
Self-timed systems often have to communicate with their environment through a clocked interface. For example, off-chip memory may require clocking and this can reduce the benefit...
116
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ICCAD
1993
IEEE
15 years 4 months ago
1993
IEEE
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
97
Voted
CSE
2009
IEEE
15 years 4 months ago
2009
IEEE
Duplicating the full dynamic capabilities of the human eye-brain combination is a difficult task but an important goal because of the wide application that a system which can acqu...
77
Voted
ASYNC
2004
IEEE
15 years 4 months ago
2004
IEEE
I use asynchronous FIFO stages that are connected in rings to generate and deliver highly precise timing signals. I introduce a Micropipeline FIFO control stage that oscillates at...