6111 search results - page 263 / 1223 » Time, Hardware, and Uniformity |
80
Voted
ISCAS
2006
IEEE
15 years 7 months ago
2006
IEEE
— This paper addresses modeling issues behind the development of a hardware analog emulator of power system behavior referred to as a Power System on a Chip (PSoC). The paper wil...
113
Voted
ISAAC
2009
Springer
15 years 7 months ago
2009
Springer
Connected bipartite permutation graphs without vertex labels are investigated. First, the number of connected bipartite permutation graphs of n vertices is given. Based on the num...
CIE
2007
Springer
15 years 7 months ago
2007
Springer
This paper introduces two complexity-theoretic formulations of Bennett’s computational depth: finite-state depth and polynomial-time depth. It is shown that for both formulation...
106
Voted
DELTA
2002
IEEE
15 years 6 months ago
2002
IEEE
A new method for hierarchical fault simulation based on multi-level Decision Diagrams (DD) is proposed. We suppose that a register transfer (RT) level information along with gate-...
101
Voted
GECCO
2009
Springer
15 years 5 months ago
2009
Springer
We benchmark the pure random search algorithm on the BBOB 2009 noise-free testbed. Each candidate solution is sampled uniformly in [−5, 5]D , where D denotes the search space di...