821 search results - page 13 / 165 » Time Dependent Processing in a Parallel Pipeline Architectur... |
DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
Abstract—This paper addresses the problem of execution time estimation for tasks in a software pipeline independent of the application structure or the underlying architecture. A...
ISCA
2003
IEEE
15 years 5 months ago
2003
IEEE
Designing ASICs for each new generation of backbone routers is a time intensive and fiscally draining process. In this paper we focus on the design of a programmable architecture...
102
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DAC
2007
ACM
16 years 24 days ago
2007
ACM
Programming multi-processor systems-on-chip (MPSoC) involves partitioning and mapping of sequential reference code onto multiple parallel processing elements. The immense potentia...
IPPS
1998
IEEE
15 years 4 months ago
1998
IEEE
An effort to formalize the process of software pipelining loops with conditions is presented in this paper. A formal framework for scheduling such loops, based on representing set...
222
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ICDE
2009
IEEE
16 years 1 months ago
2009
IEEE
We have developed a system to process database queries over composed data providing web services. The queries are transformed into execution plans containing an operator that invok...