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ASPLOS
1998
ACM
15 years 1 months ago
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
Walter Lee, Rajeev Barua, Matthew Frank, Devabhakt...
IEEEPACT
2009
IEEE
15 years 4 months ago
Architecture Support for Improving Bulk Memory Copying and Initialization Performance
—Bulk memory copying and initialization is one of the most ubiquitous operations performed in current computer systems by both user applications and Operating Systems. While many...
Xiaowei Jiang, Yan Solihin, Li Zhao, Ravishankar I...
ISCAS
2007
IEEE
202views Hardware» more  ISCAS 2007»
15 years 4 months ago
A VLSI Architecture for a Fast Computation of the 2-D Discrete Wavelet Transform
In this paper, an efficient VLSI architecture for a fast computation of the 2-D discrete wavelet transform (DWT) is proposed. The architecture employing a three-stage cascade in p...
Chengjun Zhang, Chunyan Wang, M. Omair Ahmad
IPPS
2006
IEEE
15 years 3 months ago
GPU-ABiSort: optimal parallel sorting on stream architectures
In this paper, we present a novel approach for parallel sorting on stream processing architectures. It is based on adaptive bitonic sorting. For sorting n values utilizing p strea...
Alexander Greß, Gabriel Zachmann
CGO
2009
IEEE
15 years 4 months ago
Software Pipelined Execution of Stream Programs on GPUs
—The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. This model allows programmers to sp...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...