821 search results - page 67 / 165 » Time Dependent Processing in a Parallel Pipeline Architectur... |
WSC
2004
14 years 11 months ago
2004
This paper describes the application of parallel simulation techniques to represent structured functional parallelism present within the Space Shuttle Operations Flow, utilizing t...
102
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HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Network-on-Chips (NoCs) are quite latency sensitive, since their communication latency strongly affects the application performance on recent many-core architectures. To reduce th...
102
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ISSS
2000
IEEE
15 years 2 months ago
2000
IEEE
Timing and power consumption of embedded systems are state and input data dependent. Formal analysis of such dependencies leads to intervals rather than single values. These inter...
165
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HIPC
2009
Springer
14 years 7 months ago
2009
Springer
The significant growth in computational power of modern Graphics Processing Units(GPUs) coupled with the advent of general purpose programming environments like NVIDA's CUDA,...
EUROGRAPHICS
2010
Eurographics
15 years 6 months ago
2010
Eurographics
We present a novel approach to ray tracing execution on commodity graphics hardware using CUDA. We decompose
a standard ray tracing algorithm into several data-parallel stages tha...