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» Time Management in the DoD High Level Architecture
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IPPS
2005
IEEE
15 years 3 months ago
Fast Address Translation Techniques for Distributed Shared Memory Compilers
The Distributed Shared Memory (DSM) model is designed to leverage the ease of programming of the shared memory paradigm, while enabling the highperformance by expressing locality ...
François Cantonnet, Tarek A. El-Ghazawi, Pa...
ATAL
2005
Springer
15 years 3 months ago
Extending the recognition-primed decision model to support human-agent collaboration
There has been much research investigating team cognition, naturalistic decision making, and collaborative technology as it relates to real world, complex domains of practice. How...
Xiaocong Fan, Shuang Sun, Michael D. McNeese, John...
ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
15 years 2 months ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
ASPLOS
1996
ACM
15 years 1 months ago
A Quantitative Analysis of Loop Nest Locality
This paper analyzes and quantifies the locality characteristics of numerical loop nests in order to suggest future directions for architecture and software cache optimizations. Si...
Kathryn S. McKinley, Olivier Temam
INFFUS
2007
107views more  INFFUS 2007»
14 years 9 months ago
An information fusion demonstrator for tactical intelligence processing in network-based defense
The Swedish Defence Research Agency (FOI) has developed a concept demonstrator called the Information Fusion Demonstrator 2003 (IFD03) for demonstrating information fusion methodo...
Simon Ahlberg, Pontus Hörling, Katarina Johan...