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» Time Management in the DoD High Level Architecture
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ASAP
2008
IEEE
120views Hardware» more  ASAP 2008»
14 years 11 months ago
Lightweight DMA management mechanisms for multiprocessors on FPGA
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
EDBTW
2010
Springer
15 years 1 months ago
An architecture for ad-hoc and collaborative business intelligence
The success of organizations or business networks depends on fast and well-founded decisions taken by the relevant people in their specific area of responsibility. To enable time...
Henrike Berthold, Philipp Rösch, Stefan Z&oum...
JFR
2006
109views more  JFR 2006»
14 years 9 months ago
Alice: An information-rich autonomous vehicle for high-speed desert navigation
This paper describes the implementation and testing of Alice, the California Institute of Technology's entry in the 2005 DARPA Grand Challenge. Alice utilizes a highly networ...
Lars B. Cremean, Tully B. Foote, Jeremy H. Gillula...
HUC
2007
Springer
15 years 3 months ago
Users and Batteries: Interactions and Adaptive Energy Management in Mobile Systems
Abstract. Battery lifetime has become one of the top usability concerns of mobile systems. While many endeavors have been devoted to improving battery lifetime, they have fallen sh...
Nilanjan Banerjee, Ahmad Rahmati, Mark D. Corner, ...
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
15 years 10 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...