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152
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FPL
2004
Springer
205views Hardware» more  FPL 2004»
15 years 9 months ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...
142
Voted
FSTTCS
2004
Springer
15 years 9 months ago
Adaptive Stabilization of Reactive Protocols
A self-stabilizing distributed protocol can recover from any state-corrupting fault. A self-stabilizing protocol is called adaptive if its recovery time is proportional to the numb...
Shay Kutten, Boaz Patt-Shamir
143
Voted
ISAAC
2004
Springer
153views Algorithms» more  ISAAC 2004»
15 years 9 months ago
Canonical Data Structure for Interval Probe Graphs
The class of interval probe graphs is introduced to deal with the physical mapping and sequencing of DNA as a generalization of interval graphs. The polynomial time recognition al...
Ryuhei Uehara
126
Voted
EVOW
2003
Springer
15 years 9 months ago
GAME-HDL: Implementation of Evolutionary Algorithms Using Hardware Description Languages
Evolutionary Algorithms (EAs) have been proposed as a very powerful heuristic optimization technique to solve complex problems. Many case studies have shown that they work very eff...
Rolf Drechsler, Nicole Drechsler
138
Voted
DATE
2010
IEEE
146views Hardware» more  DATE 2010»
15 years 9 months ago
Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
Rudy Beraha, Isask'har Walter, Israel Cidon, Avino...