2450 search results - page 273 / 490 » Time Mapping with Hypergraphs |
126
click to vote
AHS
2006
IEEE
15 years 9 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
132
click to vote
DATE
2006
IEEE
2006
IEEE
Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys)
15 years 9 months ago
In this paper we analyze a 3D image rendering algorithm and the different mapping schemes to implement it in a SIMD reconfigurable architecture. 3D image render is highly computat...
138
click to vote
DELTA
2006
IEEE
15 years 9 months ago
2006
IEEE
We present an approach to the synthesis of fault-tolerant hard real-time systems for safety-critical applications. We use checkpointing with rollback recovery and active replicati...
151
click to vote
ICALT
2006
IEEE
15 years 9 months ago
2006
IEEE
Generally speaking, in the e-learning systems, a course is modeled as a graph, where each node represents a knowledge node (KU) and two nodes are connected to form a semantic netw...
115
click to vote
ICCAD
2006
IEEE
15 years 9 months ago
2006
IEEE
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...