4565 search results - page 340 / 913 » Time Optimal Self-Stabilizing Algorithms |
140
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DAC
2004
ACM
16 years 6 months ago
2004
ACM
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
170
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CISS
2008
IEEE
15 years 11 months ago
2008
IEEE
— As evidenced by measurement data, channel fading and co-channel interference occur on the same time scales, and it is therefore difficult to determine if packet losses are due...
132
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DATE
2006
IEEE
15 years 11 months ago
2006
IEEE
Carry Save Adder (CSA) trees are commonly used for high speed implementation of multi-operand additions. We present a method to reduce the number of the adders in CSA trees by ext...
125
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ISQED
2002
IEEE
15 years 10 months ago
2002
IEEE
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
159
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ICANN
2001
Springer
15 years 9 months ago
2001
Springer
In many practical engineering design problems, the form of objective function is not given explicitly in terms of design variables. Given the value of design variables, under this ...