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FMICS
2006
Springer
15 years 2 months ago
Test Coverage for Loose Timing Annotations
Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
Claude Helmstetter, Florence Maraninchi, Laurent M...
CONCUR
2007
Springer
15 years 3 months ago
Checking Coverage for Infinite Collections of Timed Scenarios
We consider message sequence charts enriched with timing constraints between pairs of events. As in the untimed setting, an infinite family of time-constrained message sequence cha...
S. Akshay, Madhavan Mukund, K. Narayan Kumar
ISVLSI
2002
IEEE
129views VLSI» more  ISVLSI 2002»
15 years 4 months ago
Accelerating Retiming Under the Coupled-Edge Timing Model
Retiming has been shown to be a powerful technique for improving the performance of synchronous circuits. However, even though retiming algorithms of polynomial time complexity ha...
Ingmar Neumann, Kolja Sulimma, Wolfgang Kunz
RTCSA
2005
IEEE
15 years 4 months ago
Model Checking Timed Systems with Priorities
Priorities are used to resolve conflicts such as in resource sharing and in safety designs. The use of priorities has become indispensable in real-time system design such as in s...
Pao-Ann Hsiung, Shang-Wei Lin
86
Voted
FORTE
2001
15 years 16 days ago
A Family of Resource-Bound Real-Time Process Algebras
The Algebra of Communicating Shared Resources (ACSR) is a timed process algebra which extends classical process algebras with the notion of a resource. It takes the view that the ...
Insup Lee, Jin-Young Choi, Hee-Hwan Kwak, Anna Phi...