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2006
IEEE
117views Hardware» more  DATE 2006»
15 years 5 months ago
Formal verification of systemc designs using a petri-net based representation
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Daniel Karlsson, Petru Eles, Zebo Peng
IDA
2001
Springer
15 years 4 months ago
Fluent Learning: Elucidating the Structure of Episodes
Fluents are logical descriptions of situations that persist, andcompositefluents are statistically significant temporal relationships(nearlyidentical withthosein Allen’stemporal...
Paul R. Cohen
CONCUR
2006
Springer
15 years 3 months ago
Controller Synthesis for MTL Specifications
Abstract. We consider the control problem for timed automata against specifications given as MTL formulas. The logic MTL is a linear-time timed temporal logic which extends LTL wit...
Patricia Bouyer, Laura Bozzelli, Fabrice Chevalier
AI
2004
Springer
14 years 11 months ago
Order-sorted logic programming with predicate hierarchy
Order-sorted logic has been formalized as first-order logic with sorted terms where sorts are ordered to build a hierarchy (called a sort-hierarchy). These sorted logics lead to u...
Ken Kaneiwa
ATAL
2011
Springer
13 years 11 months ago
Reasoning about local properties in modal logic
In modal logic, when adding a syntactic property to an axiomatisation, this property will semantically become true in all models, in all situations, under all circumstances. For i...
Hans P. van Ditmarsch, Wiebe van der Hoek, Barteld...