Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...
Woongki Baek, Chi Cao Minh, Martin Trautmann, Chri...
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
Abstract We present an optimal timing control formulation for the problem of controlling autonomous puppets. In particular, by appropriately timing the different movements, entire ...
Recent research suggests that DSM clusters can benefit from parallel coherence controllers. Parallel controllers require address partitioning and synchronization to avoid handlin...
Model-based control utilizes performance models of applications to choose performant system configurations for execution of applications. The performance models used in this resea...
Vikram S. Adve, Afolami Akinsanmi, James C. Browne...