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HPCA
2003
IEEE
15 years 10 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
100
Voted
EUROSYS
2010
ACM
15 years 6 months ago
Q-Clouds: Managing Performance Interference Effects for QoS-Aware Clouds
Cloud computing offers users the ability to access large pools of computational and storage resources on demand. Multiple commercial clouds already allow businesses to replace, or...
Ripal Nathuji, Aman Kansal, Alireza Ghaffarkhah
SC
2009
ACM
15 years 4 months ago
Early performance evaluation of a "Nehalem" cluster using scientific and engineering applications
In this paper, we present an early performance evaluation of a 624-core cluster based on the Intel® Xeon® Processor 5560 (code named “Nehalem-EP”, and referred to as Xeon 55...
Subhash Saini, Andrey Naraikin, Rupak Biswas, Davi...
65
Voted
IPPS
2008
IEEE
15 years 3 months ago
Balancing HPC applications through smart allocation of resources in MT processors
Abstract—Many studies have shown that load imbalancing causes significant performance degradation in High Performance Computing (HPC) applications. Nowadays, Multi-Threaded (MT1...
Carlos Boneti, Roberto Gioiosa, Francisco J. Cazor...
IPPS
1998
IEEE
15 years 1 months ago
Dynamic Processor Allocation with the Solaris Operating System
The Loop-Level Process Control LLPC policy 9 dynamically adjusts the number of threads an application is allowed to execute based on the application's available parallelism a...
Kelvin K. Yue, David J. Lilja