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DATE
2010
IEEE
108views Hardware» more  DATE 2010»
15 years 17 days ago
Performance-asymmetry-aware topology virtualization for defect-tolerant NoC-based many-core processors
Topology virtualization techniques are proposed for NoCbased many-core processors with core-level redundancy to isolate hardware changes caused by on-chip defective cores. Prior w...
Lei Zhang 0008, Yue Yu, Jianbo Dong, Yinhe Han, Sh...
HPCA
1998
IEEE
15 years 7 months ago
Communication Across Fault-Containment Firewalls on the SGI Origin
Scalability and reliability are inseparable in high-performance computing. Fault-isolation through hardware is a popular means of providing reliability. Unfortunately, such isolat...
Kaushik Ghosh, Allan J. Christie
HPCA
1999
IEEE
15 years 7 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
ICDCS
2000
IEEE
15 years 7 months ago
On the Burstiness of the TCP Congestion-Control Mechanism in a Distributed Computing System
Several studies in network traffic characterization have concluded that network traffic is self-similar and therefore not readily amenable to statistical multiplexing in a distr...
Peerapol Tinnakornsrisuphap, Wu-chun Feng, Ian R. ...
IPPS
2010
IEEE
15 years 1 months ago
Oversubscription on multicore processors
Abstract: Existing multicore systems already provide deep levels of thread parallelism. Hybrid programming models and composability of parallel libraries are very active areas of r...
Costin Iancu, Steven Hofmeyr, Filip Blagojevic, Yi...