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ISCA
2008
IEEE
137views Hardware» more  ISCA 2008»
15 years 9 months ago
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
Engin Ipek, Onur Mutlu, José F. Martí...
ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
16 years 4 days ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
ASAP
2008
IEEE
182views Hardware» more  ASAP 2008»
15 years 9 months ago
Low-cost implementations of NTRU for pervasive security
NTRU is a public-key cryptosystem based on the shortest vector problem in a lattice which is an alternative to RSA and ECC. This work presents a compact and low power NTRU design ...
Ali Can Atici, Lejla Batina, Junfeng Fan, Ingrid V...
MSS
2005
IEEE
106views Hardware» more  MSS 2005»
15 years 8 months ago
An Architecture for Lifecycle Management in Very Large File Systems
We present a policy-based architecture STEPS for lifecycle management (LCM) in a mass scale distributed file system. The STEPS architecture is designed in the context of IBM’s ...
Akshat Verma, David Pease, Upendra Sharma, Marc Ka...
CASCON
2006
131views Education» more  CASCON 2006»
15 years 4 months ago
STAC: software tuning panels for autonomic control
One aspect of autonomic computing is the ability to identify, separate and automatically tune parameters related to performance, security, robustness and other properties of a sof...
Elizabeth Dancy, James R. Cordy