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ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
15 years 1 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
CORR
2002
Springer
156views Education» more  CORR 2002»
14 years 9 months ago
MPICH-G2: A Grid-Enabled Implementation of the Message Passing Interface
Application development for distributed-computing ``Grids'' can benefit from tools that variously hide or enable application-level management of critical aspects of the ...
Nicholas T. Karonis, Brian R. Toonen, Ian T. Foste...
86
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ASAP
2003
IEEE
169views Hardware» more  ASAP 2003»
15 years 2 months ago
Combined Multiplication and Sum-of-Squares Units
Multiplication and squaring are important operations in digital signal processing and multimedia applications. This paper presents designs for units that implement either multipli...
Michael J. Schulte, Louis Marquette, Shankar Krith...
CONCUR
1999
Springer
15 years 1 months ago
Partial Order Reduction for Model Checking of Timed Automata
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...
Marius Minea
HPCA
2008
IEEE
15 years 9 months ago
An OS-based alternative to full hardware coherence on tiled CMPs
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
Christian Fensch, Marcelo Cintra