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VLSID
2009
IEEE
107views VLSI» more  VLSID 2009»
16 years 10 days ago
Temperature Aware Scheduling for Embedded Processors
Power density has been increasing at an alarming rate in recent processor generations resulting in high on-chip temperature. Higher temperature results in poor reliability and inc...
Ramkumar Jayaseelan, Tulika Mitra
ICASSP
2009
IEEE
15 years 6 months ago
Spatial super-resolution of a diffusion field by temporal oversampling in sensor networks
We study the spatial-temporal sampling of a linear diffusion field, and show that it is possible to compensate for insufficient spatial sampling densities by oversampling in tim...
Yue M. Lu, Martin Vetterli
GLOBECOM
2008
IEEE
15 years 6 months ago
Failure Rate Minimization with Multiple Function Unit Scheduling for Heterogeneous WSNs
— Failure-Rate Minimization is becoming one of the major design issues in wireless sensor network (WSN) architecture due to multiple available Functional-units (FUs). There is a ...
Meikang Qiu, Jing Deng, Edwin Hsing-Mean Sha
ISCAS
2007
IEEE
126views Hardware» more  ISCAS 2007»
15 years 6 months ago
Optimal Body Biasing for Minimum Leakage Power in Standby Mode
— This paper describes a new power minimizing method by optimizing supply voltage control and minimizing leakage in active and standby modes, respectively. In the active mode, th...
Kyung Ki Kim, Yong-Bin Kim
DFT
2003
IEEE
79views VLSI» more  DFT 2003»
15 years 5 months ago
Partial Error Masking to Reduce Soft Error Failure Rate in Logic Circuits
A new methodology for designing logic circuits with partial error masking is described. The key idea is to exploit the asymmetric soft error susceptibility of nodes in a logic cir...
Kartik Mohanram, Nur A. Touba