—Quasi Delay Insensitive asynchronous logic is a very robust system allowing safe implementations while requiring minimal timing assumptions. Unfortunately the design methodologi...
Improvements in computer network infrastructures and information utilities have led to an increase in the number of social and work interactions carried out `virtually' by ge...
In this paper we consider the specification and verification of infinite-state systems using temporal logic. In particular, we describe parameterised systems using a new variet...
Clare Dixon, Michael Fisher, Boris Konev, Alexei L...
This paper introduces the notion of transparent distribution of real time software components. Transparent distribution means that (1) the functional and temporal behavior of a sy...
Emilia Farcas, Claudiu Farcas, Wolfgang Pree, Jose...
Synchronous design methods have intrinsic performance overheads due to their use of the global clock and timing assumptions. In future manufacturing processes not only may it beco...