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ECBS
2006
IEEE
126views Hardware» more  ECBS 2006»
15 years 11 months ago
Experiments and Investigations for the Personal High Performance Computing (PHPC) built on top of the 64-bit processing and clus
The motivation and objective for this paper is to demonstrate “Personal High Performance Computing (PHPC)”, which requires only a smaller number of computers, resources and sp...
Victor Chang
CEC
2005
IEEE
15 years 10 months ago
Parallel evolutionary algorithms on graphics processing unit
Evolutionary Algorithms (EAs) are effective and robust methods for solving many practical problems such as feature selection, electrical circuits synthesis, and data mining. Howeve...
Man Leung Wong, Tien-Tsin Wong, Ka-Ling Fok
143
Voted
DATE
2005
IEEE
155views Hardware» more  DATE 2005»
15 years 10 months ago
Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing
Fueled by an unprecedented desire for convenience and self-service, consumers are embracing embedded technology solutions that enhance their mobile lifestyles. Consequently, we wi...
Mahmut T. Kandemir, Feihui Li, Guilin Chen, Guangy...
FCCM
2005
IEEE
107views VLSI» more  FCCM 2005»
15 years 10 months ago
Simplifying the Integration of Processing Elements in Computing Systems Using a Programmable Controller
As technology sizes decrease and die area increases, designers are creating increasingly complex computing systems using FPGAs. To reduce design time for new products, the reuse o...
Lesley Shannon, Paul Chow
FPL
2005
Springer
111views Hardware» more  FPL 2005»
15 years 10 months ago
Mutable Codesign for Embedded Protocol Processing
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
Todd S. Sproull, Gordon J. Brebner, Christopher E....