769 search results - page 110 / 154 » Timed Circuit Synthesis Using Implicit Methods |
169
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DAC
2006
ACM
15 years 11 months ago
2006
ACM
This paper investigates methods for clock skew minimization using buffer and wire sizing. First, a technique that significantly improves solution quality and stability of sequent...
140
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DATE
2007
IEEE
15 years 11 months ago
2007
IEEE
This paper presents a built-in self-test (BiST) scheme for analog to digital converters (ADC) based on a linear ramp generator and efficient output analysis. The proposed analysi...
166
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ENTCS
2008
15 years 5 months ago
2008
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
117
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TASLP
2010
15 years 3 months ago
2010
—The digital emulation of analog audio effects and synthesis components, through the simulation of lumped circuit components has seen a large amount of activity in recent years; ...
168
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SCALESPACE
2009
Springer
15 years 9 months ago
2009
Springer
Abstract. We introduce a novel implicit approach for surface patch segmentation in 3D images starting from a single point. Since the boundary surface of an object is locally homeom...