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» Timed Circuit Synthesis Using Implicit Methods
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DATE
2009
IEEE
127views Hardware» more  DATE 2009»
15 years 4 months ago
Sequential logic synthesis using symbolic bi-decomposition
This paper uses under-approximation of unreachable states of a design to derive incomplete specification of combinational logic. The resulting incompletely-specified functions are...
Victor N. Kravets, Alan Mishchenko
ICCAD
2005
IEEE
168views Hardware» more  ICCAD 2005»
15 years 6 months ago
Statistical timing analysis driven post-silicon-tunable clock-tree synthesis
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...
Jeng-Liang Tsai, Lizheng Zhang
RSS
2007
151views Robotics» more  RSS 2007»
14 years 11 months ago
An Implicit Time-Stepping Method for Multibody Systems with Intermittent Contact
— In this paper we present an implicit time-stepping scheme for multibody systems with intermittent contact by incorporating the contact constraints as a set of complementarity a...
Nilanjan Chakraborty, Stephen Berard, Srinivas Ake...
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EH
2002
IEEE
154views Hardware» more  EH 2002»
15 years 2 months ago
Evolving Quantum Circuits Using Genetic Algorithm
: In this paper we focus on a general approach of using genetic algorithm (GA) to evolve Quantum circuits (QC). We propose a generic GA to evolve arbitrary quantum circuit specifie...
Martin Lukac, Marek A. Perkowski
FPGA
2006
ACM
113views FPGA» more  FPGA 2006»
15 years 1 months ago
Optimality study of logic synthesis for LUT-based FPGAs
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...
Jason Cong, Kirill Minkovich