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99
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FMSD
2008
64views more  FMSD 2008»
15 years 3 months ago
Robust safety of timed automata
Timed automata are governed by an idealized semantics that assumes a perfectly precise behavior of the clocks. The traditional semantics is not robust because the slightest perturb...
Martin De Wulf, Laurent Doyen, Nicolas Markey, Jea...
DFT
2002
IEEE
117views VLSI» more  DFT 2002»
15 years 8 months ago
Fast and Energy-Frugal Deterministic Test Through Test Vector Correlation Exploitation
Conversion of the flip-flops of the circuit into scan cells helps ease the test challenge; yet test application time is increased as serial shift operations are employed. Furthe...
Ozgur Sinanoglu, Alex Orailoglu
134
Voted
JCNS
2007
84views more  JCNS 2007»
15 years 3 months ago
Non-parametric detection of temporal order across pairwise measurements of time delays
Neuronal synchronization is often associated with small time delays, and these delays can change as a function of stimulus properties. Investigation of time delays can be cumbersom...
Danko Nikolic
ICML
2005
IEEE
16 years 4 months ago
Fast inference and learning in large-state-space HMMs
For Hidden Markov Models (HMMs) with fully connected transition models, the three fundamental problems of evaluating the likelihood of an observation sequence, estimating an optim...
Sajid M. Siddiqi, Andrew W. Moore
ASPDAC
2009
ACM
262views Hardware» more  ASPDAC 2009»
15 years 10 months ago
Fault modeling and testing of retention flip-flops in low power designs
Low power circuits have become a necessary part in modern designs. Retention flip-flop is one of the most important components in low power designs. Conventional test methodologie...
Bing-Chuan Bai, Augusli Kifli, Chien-Mo James Li, ...