Abstract. We describe a model-checking based approach to verification of programs written in the agent programming language Dribble. We define a logic (an extension of the branch...
Timed and hybrid automata are extensions of finite-state machines for formal modeling of embedded systems with both discrete and continuous components. Reachability problems for t...
Rajeev Alur, Robert P. Kurshan, Mahesh Viswanathan
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in stati...
Rectangular hybrid automatamodel digital control programs of analog plant environments. We study rectangular hybrid automatawhere the plant state evolves continuously in real-numbe...