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» Timed Verification of Asynchronous Circuits
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NIPS
2003
15 years 1 months ago
A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors
A mixed-signal image filtering VLSI has been developed aiming at real-time generation of edge-based image vectors for robust image recognition. A four-stage asynchronous median de...
Masakazu Yagi, Hideo Yamasaki, Tadashi Shibata
HYBRID
1994
Springer
15 years 3 months ago
Symbolic Controller Synthesis for Discrete and Timed Systems
This paper presents algorithms for the symbolic synthesis of discrete and real-time controllers. At the semantic level the controller is synthesized by nding a winning strategy for...
Eugene Asarin, Oded Maler, Amir Pnueli
FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
15 years 5 months ago
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report
This paper shows a method to verifying the thermal status of complex FPGA-based circuits like microprocessors. Thus, the designer can evaluate if a particular block is working bey...
Sergio López-Buedo, Eduardo I. Boemo
MJ
2007
119views more  MJ 2007»
14 years 11 months ago
Automated energy calculation and estimation for delay-insensitive digital circuits
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
Venkat Satagopan, Bonita Bhaskaran, Anshul Singh, ...
FPGA
2010
ACM
182views FPGA» more  FPGA 2010»
14 years 9 months ago
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
Doris Chen, Deshanand Singh, Jeffrey Chromczak, Da...