Sciweavers

660 search results - page 78 / 132
» Timed automata based analysis of embedded system architectur...
Sort
View
ITC
1997
IEEE
73views Hardware» more  ITC 1997»
15 years 2 months ago
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
Indradeep Ghosh, Niraj K. Jha, Sujit Dey
SBACPAD
2009
IEEE
155views Hardware» more  SBACPAD 2009»
15 years 4 months ago
SPARC16: A New Compression Approach for the SPARC Architecture
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
Leonardo Luiz Ecco, Bruno Cardoso Lopes, Eduardo C...
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
15 years 10 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda
EMSOFT
2006
Springer
15 years 1 months ago
An analysis framework for network-code programs
Distributed real-time systems require a predictable and verifiable mechanism to control the communication medium. Current real-time communication protocols are typically independe...
Madhukar Anand, Sebastian Fischmeister, Insup Lee
SENSYS
2006
ACM
15 years 3 months ago
StarDust: a flexible architecture for passive localization in wireless sensor networks
The problem of localization in wireless sensor networks where nodes do not use ranging hardware, remains a challenging problem, when considering the required location accuracy, en...
Radu Stoleru, Pascal Vicaire, Tian He, John A. Sta...