660 search results - page 83 / 132 » Timed automata based analysis of embedded system architectur... |
GLVLSI
2010
IEEE
14 years 11 months ago
2010
IEEE
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
117
click to vote
TVLSI
2008
2008
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
14 years 9 months ago
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
FOSSACS
2010
Springer
15 years 4 months ago
2010
Springer
Abstract. The reachability analysis of recursive programs that communicate asynchronously over reliable Fifo channels calls for restrictions to ensure decidability. We extend here ...
FASE
1998
Springer
15 years 2 months ago
1998
Springer
A critical issue for complex component-based systems design is the modeling and analysis of architecture. One of the complicating factors in developing architectural models is acc...
105
click to vote
EUROMICRO
2006
IEEE
15 years 1 months ago
2006
IEEE
Dynamic reconfiguration allows modifying a system during its execution, and can be used to apply patches and updates, to implement adaptive systems, dynamic instrumentation, or to...