395 search results - page 10 / 79 » Timed circuits: a new paradigm for high-speed design |
105
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DATE
2008
IEEE
15 years 8 months ago
2008
IEEE
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...
111
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VLSID
1999
IEEE
15 years 6 months ago
1999
IEEE
To minimize the time to market and cost of new sub 0.25um process technologies and products, PDF Solutions, Inc., has developed a new comprehensive approach based on the use of pr...
89
Voted
IH
1998
Springer
15 years 6 months ago
1998
Springer
Advanced CAD tools and high-density VLSI technologies have combined to create a new market for reusable digital designs. The economic viability of the new core-based design paradig...
GLVLSI
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper introduces a standard cell based design for a Serializer and Deserializer (SerDes) communication link. The proposed design is area, power and design time efficient as c...
122
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ISCAS
2006
IEEE
15 years 8 months ago
2006
IEEE
—This paper introduces a technique to measure and adjust the relative phase of on-chip high speed digital signals using a random sampling technique of inferential statistics. The...