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» Timed circuits: a new paradigm for high-speed design
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DAC
2006
ACM
16 years 2 months ago
Gain-based technology mapping for minimum runtime leakage under input vector uncertainty
The gain-based technology mapping paradigm has been successfully employed for finding minimum delay and minimum area mappings. However, existing gain-based technology mappers fail...
Ashish Kumar Singh, Murari Mani, Ruchir Puri, Mich...
GLVLSI
2000
IEEE
110views VLSI» more  GLVLSI 2000»
15 years 6 months ago
A sensitivity based placer for standard cells
We present a new timing driven method for global placement. Our method is based on the observation that similar net length reductions in the different nets that make up a path may...
Bill Halpin, C. Y. Roger Chen, Naresh Sehgal
EVOW
2001
Springer
15 years 6 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
DAC
2005
ACM
16 years 2 months ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...
ICCAD
1997
IEEE
76views Hardware» more  ICCAD 1997»
15 years 6 months ago
Simulation methods for RF integrated circuits
Abstract — The principles employed in the development of modern RF simulators are introduced and the various techniques currently in use, or expected to be in use in the next few...
Kenneth S. Kundert