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» Timed circuits: a new paradigm for high-speed design
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VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
15 years 6 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo
GECCO
2008
Springer
158views Optimization» more  GECCO 2008»
15 years 3 months ago
Structure and parameter estimation for cell systems biology models
In this work we present a new methodology for structure and parameter estimation in cell systems biology modelling. Our modelling framework is based on P systems, an unconl comput...
Francisco José Romero-Campero, Hongqing Cao...
DAC
1999
ACM
16 years 2 months ago
Behavioral Synthesis Techniques for Intellectual Property Protection
? The economic viability of the reusable core-based design paradigm depends on the development of techniques for intellectual property protection. We introduce the first dynamic wa...
Inki Hong, Miodrag Potkonjak
PARLE
1987
15 years 5 months ago
Emulating Digital Logic using Transputer Networks (very High Parallelism = Simplicity = Performance)
Modern VLSI technology has changed the economic rules by which the balance between processing power, memory and communications is decided in computing systems. This will have a pr...
Peter H. Welch
FPL
2011
Springer
168views Hardware» more  FPL 2011»
14 years 1 months ago
Scalable Arbiters and Multiplexers for On-FGPA Interconnection Networks
Abstract—Soft on-FGPA interconnection networks are gaining increasing importance since they simplify the integration of heterogeneous components and offer, at the same time, a mo...
Giorgos Dimitrakopoulos, Christoforos Kachris, Emm...