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» Timed circuits: a new paradigm for high-speed design
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DAC
2008
ACM
16 years 2 months ago
Run-time instruction set selection in a transmutable embedded processor
We are presenting a new concept of an application-specific processor that is capable of transmuting its instruction set according to non-predictive application behavior during run...
Jörg Henkel, Lars Bauer, Muhammad Shafique
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
15 years 7 months ago
Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...
Hua Xiang, Kai-Yuan Chao, Martin D. F. Wong
TVLSI
2008
176views more  TVLSI 2008»
15 years 1 months ago
A Fuzzy Optimization Approach for Variation Aware Power Minimization During Gate Sizing
Abstract--Technology scaling in the nanometer era has increased the transistor's susceptibility to process variations. The effects of such variations are having a huge impact ...
Venkataraman Mahalingam, N. Ranganathan, J. E. Har...
IACR
2011
115views more  IACR 2011»
14 years 1 months ago
Multi-Server Oblivious RAM
Secure two-party computation protocol allows two players, Alice with secret input x and Bob with secret input y, to jointly execute an arbitrary program π(x, y) such that only th...
Steve Lu, Rafail Ostrovsky
ICCAD
2003
IEEE
195views Hardware» more  ICCAD 2003»
15 years 7 months ago
Vectorless Analysis of Supply Noise Induced Delay Variation
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
Sanjay Pant, David Blaauw, Vladimir Zolotov, Savit...