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» Timed circuits: a new paradigm for high-speed design
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DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 4 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
CEC
2003
IEEE
15 years 3 months ago
A modified ant colony algorithm for evolutionary design of digital circuits
Evolutionary computation presents a new paradigm shift in hardware design and synthesis. According to this paradigm, hardware design is pursued by deriving inspiration from biologi...
Mostafa Abd-El-Barr, Sadiq M. Sait, Bambang A. B. ...
HOST
2009
IEEE
15 years 3 months ago
New Design Strategy for Improving Hardware Trojan Detection and Reducing Trojan Activation Time
Hardware Trojans in integrated circuits and systems have become serious concern to fabless semiconductor industry and government agencies in recent years. Most of the previously p...
Hassan Salmani, Mohammad Tehranipoor, Jim Plusquel...
ITC
2003
IEEE
158views Hardware» more  ITC 2003»
15 years 5 months ago
Extraction Error Diagnosis and Correction in High-Performance Designs
Test model generation is crucial in the test generation process of a high-performance design targeted for large volume production. A key process in test model generation requires ...
Yu-Shen Yang, Jiang Brandon Liu, Paul J. Thadikara...
HICSS
2007
IEEE
113views Biometrics» more  HICSS 2007»
15 years 6 months ago
Secure Software Engineering: A New Paradigm
Software defects lead to security vulnerabilities, which are costing businesses millions of dollars each year and threaten the security of individuals and the nation. It can be de...
Wm. Arthur Conklin, Glenn B. Dietrich