41 search results - page 3 / 9 » Timing Analysis for Preemptive Multi-Tasking Real-Time Syste... |
139
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ECRTS
2006
IEEE
15 years 5 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
102
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RTAS
2005
IEEE
15 years 5 months ago
2005
IEEE
We present an on-line Dynamic Voltage Scaling (DVS) algorithm for preemptive fixed-priority real-time systems called low power Limited Demand Analysis with Transition overhead (l...
114
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RTAS
2010
IEEE
14 years 10 months ago
2010
IEEE
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
111
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ECRTS
2009
IEEE
14 years 9 months ago
2009
IEEE
While hardware caches are generally effective at improving application performance, they greatly complicate performance prediction. Slight changes in memory layout or data access p...
RTSS
2007
IEEE
15 years 5 months ago
2007
IEEE
Recent years have seen the emergence of wireless sensor network systems that must support high data rate and realtime queries of physical environments. This paper proposes Real-Ti...