40 search results - page 5 / 8 » Timing Driven Placement for Large Standard Cell Circuits |
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
System-on-chip and system-in-package result in increased number of I/O cells and complicated constraints for both chip designs and package designs. This renders the traditional ma...
ICCSA
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. In this paper, we present a parallel tabu search (TS) algorithm for efficient optimization of a constrained multiobjective VLSI standard cell placement problem. The prima...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
Abstract— Regular structures are present in many types of circuits. If this structure can be identified and utilized, performance can be improved dramatically. In this paper, we...
ICCAD
2003
IEEE
15 years 2 months ago
2003
IEEE
This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation...
ISCAS
1994
IEEE
15 years 1 months ago
1994
IEEE
The Switched-Current SI technique is a circuit method that enables analog sampled-data circuits to be realized with a standard digital CMOS process. At this time it is fair to say...