521 search results - page 27 / 105 » Timing Verification Using HDTV |
100
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AMAST
2008
Springer
14 years 11 months ago
2008
Springer
Several proof systems allow the formal verification of Java programs, and a specification language was specifically designed for Java. However, none of these systems support generi...
VLSI
2007
Springer
15 years 3 months ago
2007
Springer
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
ARTS
1997
Springer
15 years 1 months ago
1997
Springer
There have been significant advances on formal methods to verify complex systems recently. Nevertheless, these methods have not yet been accepted as a realistic alternative to the ...
112
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CORR
2009
Springer
14 years 7 months ago
2009
Springer
Abstract. We apply Uppaal Tiga to automatically compute adaptive scheduling strategies for an industrial case study dealing with a state-of-the-art image processing pipeline of a p...
122
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VLSID
2010
IEEE
14 years 7 months ago
2010
IEEE
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...