Sciweavers

521 search results - page 28 / 105
» Timing Verification Using HDTV
Sort
View
CAV
2008
Springer
96views Hardware» more  CAV 2008»
15 years 2 months ago
Implied Set Closure and Its Application to Memory Consistency Verification
Hangal et. al. [3] have developed a procedure to check if an instance of the execution of a shared memory multiprocessor program, is consistent with the Total Store Order (TSO) mem...
Surender Baswana, Shashank K. Mehta, Vishal Powar
112
Voted
DAC
2007
ACM
16 years 1 months ago
PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels
Abstract-- The PPV is a robust phase domain macromodel for oscillators. It has been proven to predict oscillators' responses correctly under small signal perturbations, and ca...
Zhichun Wang, Xiaolue Lai, Jaijeet S. Roychowdhury
SIGSOFT
2007
ACM
16 years 1 months ago
Quantitative verification: models techniques and tools
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
Marta Z. Kwiatkowska
SRDS
2000
IEEE
15 years 4 months ago
Detection of Livelocks in Communication Protocols by Means of a Polygon Time Structure
As has been shown, the polygon time structure overcomes the main limitations of the interval time structure, and allows to verify communication protocols, in which the explicit co...
Jerzy Brzezinski, Michal Sajkowski
DAC
1997
ACM
15 years 4 months ago
A C-Based RTL Design Verification Methodology for Complex Microprocessor
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon ...