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DAC
2003
ACM
15 years 10 months ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
DAC
2005
ACM
14 years 11 months ago
Matlab as a development environment for FPGA design
In this paper we discuss an efficient design flow from Matlab® to FPGA. Employing Matlab for algorithm research and as system level language allows efficient transition from algo...
Tejas M. Bhatt, Dennis McCain
SIGSOFT
2008
ACM
15 years 10 months ago
Finding programming errors earlier by evaluating runtime monitors ahead-of-time
Runtime monitoring allows programmers to validate, for instance, the proper use of application interfaces. Given a property specification, a runtime monitor tracks appropriate run...
Eric Bodden, Patrick Lam, Laurie J. Hendren
ECLIPSE
2005
ACM
14 years 11 months ago
Leveraging Eclipse for integrated model-based engineering of web service compositions
In this paper we detail the design and implementation of an Eclipse plug-in for an integrated, model-based approach, to the engineering of web service compositions. The plug-in al...
Howard Foster, Sebastián Uchitel, Jeff Mage...
SIGSOFT
2005
ACM
15 years 10 months ago
Fluent temporal logic for discrete-time event-based models
Fluent model checking is an automated technique for verifying that an event-based operational model satisfies some state-based declarative properties. The link between the event-b...
Emmanuel Letier, Jeff Kramer, Jeff Magee, Sebasti&...