435 search results - page 28 / 87 » Timing analysis of asynchronous circuits using timed automat... |
119
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IJFCS
2008
15 years 16 days ago
2008
Abstract. Recently, it has been shown that for any higher order pushdown system H and for any regular set C of configurations, the set pre H(C), is regular. In this paper, we give ...
137
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TCAD
2008
15 years 13 days ago
2008
Manufacturing process variations lead to variability in circuit delay and, if not accounted for, can cause excessive timing yield loss. The familiar traditional approaches to timin...
111
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ATVA
2009
Springer
15 years 4 months ago
2009
Springer
TAPAAL is a new platform independent tool for modelling, simulation and verification of timed-arc Petri nets. TAPAAL provides a stand-alone editor and simulator, while the verifica...
118
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CAV
2003
Springer
15 years 4 months ago
2003
Springer
Thispapergivesashort overviewofa model checking tool forreal-time systems. The modeling language are timed automata extended with concepts for modular modeling. The tool provides r...
123
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ICCAD
2009
IEEE
14 years 10 months ago
2009
IEEE
Process and environmental variations continue to present significant challenges to designers of high-performance integrated circuits. In the past few years, while much research has...