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111
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ISLPED
2003
ACM
129views Hardware» more  ISLPED 2003»
15 years 5 months ago
A critical analysis of application-adaptive multiple clock processors
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
Emil Talpes, Diana Marculescu
ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
15 years 9 months ago
A new statistical max operation for propagating skewness in statistical timing analysis
Statistical static timing analysis (SSTA) is emerging as a solution for predicting the timing characteristics of digital circuits under process variability. For computing the stat...
Kaviraj Chopra, Bo Zhai, David Blaauw, Dennis Sylv...
103
Voted
IPPS
2003
IEEE
15 years 5 months ago
SoCBUS: Switched Network on Chip for Hard Real Time Embedded Systems
With the current trend in integration of more complex systems on chip there is a need for better communication infrastructure on chip that will increase the available bandwidth an...
Daniel Wiklund, Dake Liu
112
Voted
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
15 years 9 months ago
A Fast Delay Analysis Algorithm for The Hybrid Structured Clock Network
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...
Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheld...
DATE
2004
IEEE
142views Hardware» more  DATE 2004»
15 years 4 months ago
Eliminating False Positives in Crosstalk Noise Analysis
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...
Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Mal...