435 search results - page 49 / 87 » Timing analysis of asynchronous circuits using timed automat... |
128
Voted
ICCAD
1997
IEEE
15 years 4 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
107
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RTSS
1997
IEEE
15 years 4 months ago
1997
IEEE
We present a method for providing response-time guarantees in Asynchronous Transfer Mode (ATM) networks. The method is based on traditional real-time CPU Response-Time Analysis (R...
91
Voted
ICCAD
1997
IEEE
15 years 4 months ago
1997
IEEE
The circuit tuning problem is best approached by means of gradient-based nonlinear optimization algorithms. For large circuits, gradient computation can be the bottleneck in the o...
104
Voted
ISPD
2003
ACM
15 years 5 months ago
2003
ACM
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
115
Voted
ISCAS
2003
IEEE
15 years 5 months ago
2003
IEEE
We present an equation-based transistor size optimizer that minimizes delay of custom circuits. Our method uses static timing analysis to find the critical paths and numerical met...