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TIM
2010
294views Education» more  TIM 2010»
14 years 7 months ago
Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
HeungJun Jeon, Yong-Bin Kim, Minsu Choi
118
Voted
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
15 years 5 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
CORR
2009
Springer
242views Education» more  CORR 2009»
14 years 10 months ago
Adaptive Scheduling of Data Paths using Uppaal Tiga
Abstract. We apply Uppaal Tiga to automatically compute adaptive scheduling strategies for an industrial case study dealing with a state-of-the-art image processing pipeline of a p...
Israa AlAttili, Fred Houben, Georgeta Igna, Steffe...
106
Voted
ICCAD
2003
IEEE
141views Hardware» more  ICCAD 2003»
15 years 5 months ago
An Enhanced Multilevel Algorithm for Circuit Placement
This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation...
Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shin...
PAA
2008
15 years 12 days ago
Online nonparametric discriminant analysis for incremental subspace learning and recognition
This paper presents a novel approach for online subspace learning based on an incremental version of the nonparametric discriminant analysis (NDA). For many real-world applications...
Bogdan Raducanu, Jordi Vitrià