435 search results - page 59 / 87 » Timing analysis of asynchronous circuits using timed automat... |
104
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VTS
2003
IEEE
15 years 5 months ago
2003
IEEE
In this paper, an efficient technique for test data volume reduction based on the shared scan-in (Illinois Scan) architecture and the scan chain reconfiguration (Dynamic Scan) arc...
89
Voted
DAC
2004
ACM
16 years 1 months ago
2004
ACM
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
95
Voted
TCAD
2010
14 years 10 months ago
2010
—With the scaling of complementary metal–oxide– semiconductor (CMOS) technology into the nanometer regime, the overshooting effect due to the input-to-output coupling capacit...
TCAD
2002
15 years 2 days ago
2002
We develop a general methodology to analyze crosstalk effects that are likely to cause errors in deep submicron high speed circuits. We focus on crosstalk due to capacitive coupli...
101
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ANSS
2000
IEEE
15 years 4 months ago
2000
IEEE
Computer simulation of switching power converters is complicated by the discontinuous (switching) nature of the converter waveforms. When switching details of the waveforms are of...