435 search results - page 68 / 87 » Timing analysis of asynchronous circuits using timed automat... |
92
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CHES
2006
Springer
15 years 4 months ago
2006
Springer
In recent years, some countermeasures against Differential Power Analysis (DPA) at the logic level have been proposed. At CHES 2005 conference, Popp and Mangard proposed a new coun...
93
Voted
FORTE
2007
15 years 1 months ago
2007
Abstract. We present a formal specification and analysis of a faulttolerant DHCP algorithm, used to automatically configure certain host parameters in an IP network. Our algorith...
113
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ENTCS
2008
15 years 12 days ago
2008
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
IPPS
2008
IEEE
15 years 6 months ago
2008
IEEE
Enabling circuit switching in multiprocessor systems has the potential to achieve more efficient communication with lower cost compared to packet/wormhole switching. However, in ...
105
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FORMATS
2008
Springer
15 years 1 months ago
2008
Springer
Abstract. We apply three different modeling frameworks -- timed automata (Uppaal), colored Petri nets and synchronous data flow -- to model a challenging industrial case study that...