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VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
15 years 10 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
GLVLSI
2010
IEEE
190views VLSI» more  GLVLSI 2010»
15 years 2 days ago
A linear statistical analysis for full-chip leakage power with spatial correlation
In this paper, we present an approved linear-time algorithm for statistical leakage analysis in the present of any spatial correlation condition (strong or weak). The new algorith...
Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong
SIROCCO
2007
14 years 11 months ago
Data Aggregation in Sensor Networks: Balancing Communication and Delay Costs
In a sensor network the sensors, or nodes, obtain data and have to communicate these data to a central node. Because sensors are battery powered they are highly energy constrained....
Peter Korteweg, Alberto Marchetti-Spaccamela, Leen...
ICCD
2007
IEEE
121views Hardware» more  ICCD 2007»
15 years 7 months ago
Fast power network analysis with multiple clock domains
This paper proposes an efficient analysis flow and an algorithm to identify the worst case noise for power networks with multiple clock domains. First, we apply the Laplace transf...
Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Z...
VTS
2008
IEEE
119views Hardware» more  VTS 2008»
15 years 4 months ago
Error Sequence Analysis
With increasing IC process variation and increased operating speed, it is more likely that even subtle defects will lead to the malfunctioning of a circuit. Various fault models, ...
Jaekwang Lee, Intaik Park, Edward J. McCluskey