184 search results - page 11 / 37 » Timing budgeting under arbitrary process variations |
108
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ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
113
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DSN
2011
IEEE
14 years 5 days ago
2011
IEEE
—As process technology shrinks devices, circuits experience accelerated wearout. Monitoring wearout will be critical for improving the efficiency of error detection and correctio...
DATE
2006
IEEE
15 years 6 months ago
2006
IEEE
Process variations due to lens aberrations are to a large extent systematic, and can be modeled for purposes of analyses and optimizations in the design phase. Traditionally, vari...
106
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DAC
2006
ACM
16 years 1 months ago
2006
ACM
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
176
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SIGMOD
2007
ACM
16 years 16 days ago
2007
ACM
Many database applications require the analysis and processing of data streams. In such systems, huge amounts of data arrive rapidly and their values change over time. The variati...