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» Timing budgeting under arbitrary process variations
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CODES
2010
IEEE
14 years 8 months ago
Statistical approach in a system level methodology to deal with process variation
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...
Concepción Sanz Pineda, Manuel Prieto, Jos&...
ISQED
2007
IEEE
128views Hardware» more  ISQED 2007»
15 years 4 months ago
A Model for Timing Errors in Processors with Parameter Variation
Parameter variation in integrated circuits causes sections of a chip to be slower than others. To prevent any resulting timing errors, designers have traditionally designed for th...
Smruti R. Sarangi, Brian Greskamp, Josep Torrellas
DAC
2005
ACM
14 years 12 months ago
Mapping statistical process variations toward circuit performance variability: an analytical modeling approach
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
Yu Cao, Lawrence T. Clark
ISLPED
2006
ACM
119views Hardware» more  ISLPED 2006»
15 years 3 months ago
Process variation aware cache leakage management
In a few technology generations, limitations of fabrication processes will make accurate design time power estimates a daunting challenge. Static leakage current which comprises a...
Ke Meng, Russ Joseph
SCALESPACE
2009
Springer
15 years 4 months ago
A Variational Model for Interactive Shape Prior Segmentation and Real-Time Tracking
In this paper, we introduce a semi-automated segmentation method based on minimizing the Geodesic Active Contour energy incorporating a shape prior. We increase the robustness of t...
Manuel Werlberger, Thomas Pock, Markus Unger, Hors...